The polarity of the charge carriers injected through Schottky junctions of α-phase molybdenum ditelluride (α-MoTe2) and various metals was characterized. We found that the Fermi-level pinning in the metal/α-MoTe2 Schottky junction is so weak that the polarity of the carriers (electron or hole) injected from the junction can be controlled by the work function of the metals, in contrast to other transition metal dichalcogenides such as MoS2. From the estimation of the Schottky barrier heights, we obtained p-type carrier (hole) injection from a Pt/α-MoTe2 junction with a Schottky barrier height of 40 meV at the valence band edge. n-Type carrier (electron) injection from Ti/α-MoTe2 and Ni/α-MoTe2 junctions was also observed with Schottky barrier heights of 50 and 100 meV, respectively, at the conduction band edge. In addition, enhanced ambipolarity was demonstrated in a Pt–Ti hybrid contact with a unique structure specially designed for polarity-reversible transistors, in which Pt and Ti electrodes were placed in parallel for injecting both electrons and holes.Keywords: carrier injection; Fermi-level pinning; field-effect transistor; Schottky junction; transition metal dichalcogenide;

Transition metal oxides show much promise as effective p-type contacts and dopants in electronics based on transition metal dichalcogenides. Here we report that atomically thin films of under-stoichiometric tungsten oxides (WOx with x < 3) grown on tungsten diselenide (WSe2) can be used as both controlled charge transfer dopants and low-barrier contacts for p-type WSe2 transistors. Exposure of atomically thin WSe2 transistors to ozone (O3) at 100 °C results in self-limiting oxidation of the WSe2 surfaces to conducting WOx films. WOx-covered WSe2 is highly hole-doped due to surface electron transfer from the underlying WSe2 to the high electron affinity WOx. The dopant concentration can be reduced by suppressing the electron affinity of WOx by air exposure, but exposure to O3 at room temperature leads to the recovery of the electron affinity. Hence, surface transfer doping with WOx is virtually controllable. Transistors based on WSe2 covered with WOx show only p-type conductions with orders of magnitude better on-current, on/off current ratio, and carrier mobility than without WOx, suggesting that the surface WOx serves as a p-type contact with a low hole Schottky barrier. Our findings point to a simple and effective strategy for creating p-type devices based on two-dimensional transition metal dichalcogenides with controlled dopant concentrations.

Adsorption sites of molecules critically determine the electric/photonic properties and the stability of heterogeneous molecule–metal interfaces. Then, selectivity of adsorption site is essential for development of the fields including organic electronics, catalysis, and biology. However, due to current technical limitations, site-selectivity, i.e., precise determination of the molecular adsorption site, remains a major challenge because of difficulty in precise selection of meaningful one among the sites. We have succeeded the single site-selection at a single-molecule junction by performing newly developed hybrid technique: simultaneous characterization of surface enhanced Raman scattering (SERS) and current–voltage (I–V) measurements. The I–V response of 1,4-benzenedithiol junctions reveals the existence of three metastable states arising from different adsorption sites. Notably, correlated SERS measurements show selectivity toward one of the adsorption sites: “bridge sites”. This site-selectivity represents an essential step toward the reliable integration of individual molecules on metallic surfaces. Furthermore, the hybrid spectro-electric technique reveals the dependence of the SERS intensity on the strength of the molecule–metal interaction, showing the interdependence between the optical and electronic properties in single-molecule junctions.

Growth of a uniform oxide film with a tunable thickness on two-dimensional transition metal dichalcogenides is of great importance for electronic and optoelectronic applications. Here we demonstrate homogeneous surface oxidation of atomically thin WSe2 with a self-limiting thickness from single- to trilayers. Exposure to ozone (O3) below 100 °C leads to the lateral growth of tungsten oxide selectively along selenium zigzag-edge orientations on WSe2. With further O3 exposure, the oxide regions coalesce and oxidation terminates leaving a uniform thickness oxide film on top of unoxidized WSe2. At higher temperatures, oxidation evolves in the layer-by-layer regime up to trilayers. The oxide films formed on WSe2 are nearly atomically flat. Using photoluminescence and Raman spectroscopy, we find that the underlying single-layer WSe2 is decoupled from the top oxide but hole-doped. Our findings offer a new strategy for creating atomically thin heterostructures of semiconductors and insulating oxides with potential for applications in electronic devices.

A doping-free transistor made of ambipolar α-phase molybdenum ditelluride (α-MoTe2) is proposed in which the transistor polarity (p-type and n-type) is electrostatically controlled by dual top gates. The voltage signal in one of the gates determines the transistor polarity, while the other gate modulates the drain current. We demonstrate the transistor operation experimentally, with electrostatically controlled polarity of both p- and n-type in a single transistor.Keywords: ambipolar; field-effect transistor; molybdenum ditelluride; polarity control; transition metal dichalcogenide;

The integration of graphene and other atomically flat, two-dimensional materials has attracted much interest and been materialized very recently. An in-depth understanding of transport mechanisms in such heterostructures is essential. In this study, vertically stacked graphene-based heterostructure transistors were manufactured to elucidate the mechanism of electron injection at the interface. The temperature dependence of the electrical characteristics was investigated from 300 to 90 K. In a careful analysis of current–voltage characteristics, an unusual decrease in the effective Schottky barrier height and increase in the ideality factor were observed with decreasing temperature. A model of thermionic emission with a Gaussian distribution of barriers was able to precisely interpret the conduction mechanism. Furthermore, mapping of the effective Schottky barrier height is unmasked as a function of temperature and gate voltage. The results offer significant insight for the development of future layer-integration technology based on graphene-based heterostructures.

Understanding the interfacial electrical properties between metallic electrodes and low-dimensional semiconductors is essential for both fundamental science and practical applications. Here we report the observation of thickness reduction induced crossover of electrical contact at Au/MoS2 interfaces. For MoS2 thicker than 5 layers, the contact resistivity slightly decreases with reducing MoS2 thickness. By contrast, the contact resistivity sharply increases with reducing MoS2 thickness below 5 layers, mainly governed by the quantum confinement effect. We find that the interfacial potential barrier can be finely tailored from 0.3 to 0.6 eV by merely varying MoS2 thickness. A full evolution diagram of energy level alignment is also drawn to elucidate the thickness scaling effect. The finding of tailoring interfacial properties with channel thickness represents a useful approach controlling the metal/semiconductor interfaces which may result in conceptually innovative functionalities.Keywords: chalcogenide; electrical contact; field-effect transistor; quantum confinement; Schottky barrier; two-dimensional material;

Two-dimensional semiconductors are structurally ideal channel materials for the ultimate atomic electronics after silicon era. A long-standing puzzle is the low carrier mobility (μ) in them as compared with corresponding bulk structures, which constitutes the main hurdle for realizing high-performance devices. To address this issue, we perform a combined experimental and theoretical study on atomically thin MoS2 field effect transistors with varying the number of MoS2 layers (NLs). Experimentally, an intimate μ–NL relation is observed with a 10-fold degradation in μ for extremely thinned monolayer channels. To accurately describe the carrier scattering process and shed light on the origin of the thinning-induced mobility degradation, a generalized Coulomb scattering model is developed with strictly considering device configurative conditions, that is, asymmetric dielectric environments and lopsided carrier distribution. We reveal that the carrier scattering from interfacial Coulomb impurities (e.g., chemical residues, gaseous adsorbates, and surface dangling bonds) is greatly intensified in extremely thinned channels, resulting from shortened interaction distance between impurities and carriers. Such a pronounced factor may surpass lattice phonons and serve as dominant scatterers. This understanding offers new insight into the thickness induced scattering intensity, highlights the critical role of surface quality in electrical transport, and would lead to rational performance improvement strategies for future atomic electronics.

We present the temperature-dependent carrier mobility of atomically thin MoS2 field-effect transistors on crystalline hexagonal boron nitride (h-BN) and SiO2 substrates. Our results reveal distinct weak temperature dependence of the MoS2 devices on h-BN substrates. The room temperature mobility enhancement and reduced interface trap density of the single and bilayer MoS2 devices on h-BN substrates further indicate that reducing substrate traps is crucial for enhancing the mobility in atomically thin MoS2 devices.

One of the major factors driving the fast growth of the semiconductor manufacturing industry is a steady decrease in production costs. For traditional semiconductors, most of the cost originates from infrastructure, equipment, and processing. In contrast with low-cost strategies involving organic semiconductors, the materials can easily become one of the greatest costs. Here, we demonstrate a simple and efficient fabrication process, which involves in situ purification via spin-coating from organic semiconductor/polymer blends, to eliminate the influence of impurities on the electrical properties of the semiconductor. Thus, we achieve the same performance using low-purity, low-cost materials for transistor arrays with patterned organic semiconducting crystals as that obtained from high-purity materials. The exclusion of impurities is attributed to the vertical phase separation and crystallization that occur during spin-coating, which produces purified organic semiconducting crystals. With this reduction in cost, our results can redirect organic electronics to seek the lowest purity and lowest cost material that still provides adequate performance, rather than simply using the highest purity and costliest materials.

Self-assembly of interfaces is of great interest in physical and chemical domains. One of the most challenging targets is to obtain an optimal interface structure showing good electronic properties by solution-processing. Interfaces of semiconductor/semiconductor, semiconductor/insulator and insulator/insulator have been successfully manipulated to obtain high-performance devices. In this review we discuss a special class of interface, semiconductor/insulator interface, formed by vertical phase separation during spin-coating and focus on the versatile applications in organic field-effect transistors (OFETs). The formation of such an interface can be finished within tens of seconds and its mechanism is related to the materials, surfaces and dynamics. Fascinatingly, such self-assembly could be used to simplify the fabrication procedure, improve film spreading, change interfacial properties, modify semiconductor morphology, and encapsulate thin films. These merits lead to OFETs with high performance and good reliability. Also, the method is very suitable for combining with other solution-processed techniques such as patterning and post-annealing, which leads to facile paper electronics, in situ purification and single crystal formation. Research on this topic not only provides an in-depth understanding of self-assembly in solution processing, but also opens new paths towards flexible organic electronics.

•Optimal contacts should have smallest size but possess minimum contact effects.•Six times of semiconductor film thickness is found to be optimal for contact length.•It increases in nanoscale channels with more hopping and anisotropic transport.•This optimal contact length is independent of semiconductors and variable mobility.We report on a study seeking an optimized contact configuration for organic transistors that minimizes contact effects but maintains smallest contact size. We begin with the bulk access resistance in staggered transistors which results from the charge transport through the organic semiconductor film. Bulk access resistance is an intrinsic contributor to the contact resistance which has been little understood due to lack of a reliable study tool. In this work, we utilize the inner transported power inside the semiconductor film as a medium to investigate the contact resistance and the relevant contact effects. We examine the influences of the organic film thickness (tSC), the channel length (L), the underlying charge transport and various organic semiconductor materials with variable carrier mobility. A roughly optimal contact length (LC) of LC0 ≈ 6tSC is obtained. The results reveal that besides the device architecture the underlying charge transport should be also taken into account in designing organic transistors for practical application.Graphical abstract

We report single crystal formation of organic semiconducting small molecules via solvent vapor annealing (SVA) on a polymer base film (PBF). The soluble PBF strongly assists the self-assembly of small molecules to form single crystals; this sharply contrasts typical SVA where the inorganic base film such as SiO2 plays little or no role. We use a matrix of organic solvents and polymers to systematically investigate the re-crystallization of dioctylbenzothienobenzothiophene (C8-BTBT) by SVA on polymer surfaces. Crystallization by SVA clearly correlates with the miscibility of solvents and PBFs. The PBF dramatically increases the amount of condensed solvent on the surface. The additional solvent enhances the molecular mobility of small molecules to allow self-assembly in a distance over hundreds of microns, and stimulates crystal growth via Ostwald ripening. Based on this mechanism, the final crystal size of small molecules can be controlled to vary from tens of microns to millimetres simply by modifying the thickness of the base film. The approach was successfully applied to several semiconducting small molecules to form single crystals that exhibited field-effect response. Hence SVA on PBF is presented as a general and promising method for the direct fabrication of organic single crystals on polymer dielectrics.

A novel thienoacene compound, dihexyl-substituted dibenzo[d,d′]thieno[3,2-b;4,5-b′]dithiophene (C6-DBTDT), is developed as a p-type organic semiconductor for high-performance organic field-effect transistors. Insertion of an acceptor material at the contact interface enables substantial reduction in the threshold voltage and hysteresis behavior, and the field-effect mobilities of 2.5 and 3.1 cm2 V−1 s−1 are achieved for the C6-DBTDT film vacuum-deposited at room temperature and 80 °C, respectively.

We propose a novel sloped dielectric geometry in graphene as a band engineering method for widening the depletion region and increasing the electrical rectification effect in graphene pn junctions. Enhanced current-rectification was achieved in a bilayer graphene with a sloped dielectric top gate and a normal back gate. A bias was applied to the top gate to induce a spatially modulated and sloped band configuration, while a back-gate bias was applied to open a bandgap. The sloped band can be tuned to separate n- and p-type regions in the bilayer graphene, depending on a suitable choice of gate voltage. The effective depletion region between the n- and p-type regions can be spatially enlarged due to the proposed top-gate structure. As a result, a strong non-linear electric current was observed during drain bias sweeping, demonstrating the expected rectification behavior with an on/off ratio higher than all previously reported values for graphene pn junctions. The observed rectification was modified to a linear current–voltage relationship by adjusting the biases of both gates to form an nn- or pp-type junction configuration. These results demonstrate that an external voltage can control the current flow in atomic film diodes.

We control the growth of high-quality organic semiconducting crystals in the aim of transistor application. By finely tuning the processing parameters, both isolated crystals showing characteristic facet angles and irregular-shaped, thin crystalline domains are obtained in large sizes (>400 μm). Structural investigations indicate that the various shapes of crystals are in the same crystal structure, and reveal that the irregular-shaped crystalline domains are composed by terrace of molecularly flat regions, which can be up to hundreds of microns in size. When applied in field-effect transistors, the thin crystalline domains exhibit the best performance showing μFET up to 4.4 cm2/V s. This is an order of magnitude higher than that of the transistors made from as-spun films and thick crystals. The approach well demonstrates the importance of fine control of crystal formation and can be generally used for getting organic crystal transistors.Graphical abstractHighlights► Form semiconductor crystals from simple solution process. ► Obtain crystals of various quality and morphology by process control. ► Molecularly flat regions in crystals are up to hundreds of microns large. ► Transistor mobility reaches 4.4 cm2/V s.

Solution-processed organic crystals are important in field-effect transistors because of their highly ordered molecular packing and ease of device fabrication. For practical applications, the patterning of organic crystal transistor arrays is critical. However, uniformity, which concerns the variation in electrical performance among devices fabricated simultaneously on the same substrate, is a common consideration in the commercial applications of the solution-processed organic crystal transistor arrays. Here, a simple approach for fabricating field-effect transistor arrays based on organic plate-like crystals is reported. Through this method, a direct spin-coating process from a mixture solution of organic semiconductor and polymer dielectric can produce organic plate-like crystals. The grain size of the crystals is observed to be hundreds of micrometers. By controlling the concentrations of the active materials, the transistor arrays exhibit high uniformity and good device performance. The results presented in this work promise that this approach is a comparable technology to hydrogenated amorphous silicon-based FETs and is a great candidate for practical applications in electronic devices.Graphical abstractHighlights► Patterned plate-like organic crystals for field-effect transistor arrays. ► Organic crystals were formed by a direct spin-coating process. ► Transistor arrays showed good device performance and high uniformity with small variation.

We report one-step formation of the gate dielectric and conduction channel for enhancing the performance of organic field effect transistors (OFETs). The resulting OFET with the semiconductor/dielectric bi-layers spun in ambient conditions exhibits μFET up to 1.6 cm2/V s and on–off ratio higher than 106, no additional treatment needed. Contact angle measurements and absorption spectra reveals that a well-defined semiconductor-top and dielectric-bottom film form after spin-coating the mixture of the two components, which is due to the surface induced self-organized phase separation. Compared to the single layer semiconductor film, the staggered film exhibits over 5 times higher mobility and nearly 90% reduced hysteresis in OFET. The higher performance is attributed to the simultaneous optimization in the dielectric interface and semiconductor crystallization. The approach is significant for the fabrication of low cost, easy processed and high performance OFETs.Graphical abstractHighlights► Form semiconductor and dielectric layers by one step spin-coating in ambient air. ► Enable high-boiling point solvents to be used in spin-coating semiconductor. ► Simultaneously optimize the dielectric interface and semiconductor crystallization. ► Enhance transistor mobility by 5 times. ► Reduce hysteresis by nearly 90%.

Large surface roughness is a major obstacle for electronic systems fabricated on paper substrates. Here, a mixture solution of organic semiconductor and polymer dielectric was spin-coated on paper substrate with a patterned wettability. This spin-coating process produced organic crystals and a very smooth semiconductor/dielectric interface with a low trap density in well-confined patterns. Despite the large roughness of the paper substrate, the fabricated transistor arrays exhibited high performance with a field-effect mobility reaching 1.3 cm2/V s and an on/off ratio of 108. The presented results offer a simple fabrication method for the current rapidly developing technology of paper electronics.Graphical abstractHighlights► Solution-processed organic crystals in well-confined patterns for FET arrays on paper substrate. ► A solution-processed approach for the patterning of paper surface wettability. ► A simple, fast, and direct spin-coating process for the growth of organic crystals. ► High performance with μFET of 1.3 cm2/V s and on/off ratio of 108. ► Smooth semiconductor/dielectric interface with low trap density.

A study of the contact resistance (Rsd) in pentacene-based double-gate transistors is presented. In top-contact transistors, as the negative bias of the additional top-gate bias is increased, Rsd decreases by over five orders of magnitude for small bottom-gate voltages. In bottom-contact transistors, Rsd is reduced by about ten times for all bias values, implying improved charge transport in all operating regimes. The different tunability of Rsd in top/bottom-contact transistors is attributed to different charge injection modulation by the coplanar/staggered top gate. Therefore, double-gate architecture offers a novel and effective approach to limit Rsd and its relevant impacts on organic transistor.Graphical abstractHighlights► Contact resistance (Rsd) can be tuned in the double-gate OFETs. ► In TC transistors, Rsd can be reduced by the negatively increased top-gate bias. ► In BC transistors, Rsd can be effectively reduced over all biases. ► Higher tunability in BC devices is attributed to staggered configuration. ► Double-gate architecture could be a novel and effective manner to reduce Rsd.

Liquid gallium on the silicon carbide (SiC) surface forms graphene directly on non-conductive SiC surfaces at lower temperatures than are required for SiC decomposition. The uniformity and reproducibility across large areas have been one challenge. In this paper we demonstrate controllable growth of graphene with uniform characterization across the film surface. We show that material from the reaction cell was incorporated into the graphene films, which would likely work for many different materials and dopants. But when no other component is added, controllable graphene films will form with reproducible characterization over the entire surface contacted by the gallium flux. Additional carbon dissolved in the gallium can be used to cause a uniform layer of graphite crystals form and adsorb on the outer layer of the graphene films. These different pathways for gallium melt-assisted interfacial graphene (MAIG) growth can be used to tailor the production of graphene.Highlights► Molten gallium can promote uniform epitaxial growth of graphene if it only touches silicon carbide and inert materials. ► Material, including SiO2, from a solid support can be incorporated into graphene being formed by Ga-MAIG. ► Excess carbon produces sub-micron graphite crystals that deposit on the graphene surface and increase the surface area. ► Uniform growth, doping from a solid support, and adding excess carbon could be used to produce patterned graphene.

Graphene and graphite synthesis of uniform films is becoming routine, so now efforts are turning to grow specific patterns or complex structures. More research is needed with regard to the practical aspects of the growth of graphene layers, especially as it relates to self-assembled structures. We used gallium-catalyzed thermal decomposition of silicon carbide to understand spatially confined growth. Growing graphene layers push on a large step in hard silicon carbide (SiC) with significant force, as observed by high-resolution transmission electron microscopy of film cross sections. Alternatively multiple graphitic layers can grow into disks embedded in silicon carbide if the crystal is heated above the transition to plastic deformation. Euler buckling appears to limit the size and deformation of the silicon carbide crystal to produce graphitic flakes with an oriented hexagonal shape. These results illustrate the effect of the mechanical force of growing graphene in confined spaces: the growing graphene can be redirected, graphene can deform the confining barrier, or growth of graphene can be limited. This also provides a route for fabrication of masses of homogeneous, hexagonal disks of graphite with dimensions that are tuned by directed self-assembly.

We demonstrate the possibility in quantifying the Raman intensities for both specimen and substrate layers in a common stacked experimental configuration and, consequently, propose a general and rapid thickness identification technique for atomic-scale layers on dielectric substrates. Unprecedentedly wide-range Raman data for atomically flat MoS2 flakes are collected to compare with theoretical models. We reveal that all intensity features can be accurately captured when including optical interference effect. Surprisingly, we find that even freely suspended chalcogenide few-layer flakes have a stronger Raman response than that from the bulk phase. Importantly, despite the oscillating intensity of specimen spectrum versus thickness, the substrate weighted spectral intensity becomes monotonic. Combined with its sensitivity to specimen thickness, we suggest this quantity can be used to rapidly determine the accurate thickness for atomic layers.Keywords: atomic layer; characterization; nanomaterial; Raman enhancement

Realization of logic circuits in graphene with an energy gap (EG) remains one of the main challenges for graphene electronics. We found that large transport EGs (>100 meV) can be fulfilled in dual-gated bilayer graphene underneath a simple alumina passivation top gate stack, which directly contacts the graphene channels without an inserted buffer layer. With the presence of EGs, the electrical properties of the graphene transistors are significantly enhanced, as manifested by enhanced on/off current ratio, subthreshold slope, and current saturation. For the first time, complementary-like semiconducting logic graphene inverters are demonstrated that show a large improvement over their metallic counterparts. This result may open the way for logic applications of gap-engineered graphene.Keywords: energy gap; field-effect transistor; graphene; logic gate; nanoelectronics

We developed a simple and novel method to fabricate complementary-like logic inverters based on ambipolar graphene field-effect transistors (FETs). We found that the top gate stacks (with both the metal and oxide layers) can be simply prepared with only one-step deposition process and show high capacitive efficiency. By employing such a top gate as the operating terminal, the operating bias can be lowered within 2 V. In addition, the complementary p- and n-type FET pairs can be also simply fulfilled through potential superposition effect from the drain bias. The inverters can be operated, with up to 4−7 voltage gains, in both the first and third quadrants due to the ambipolarity of graphene FETs. For the first time, a match between the input and output voltages is achieved in graphene logic devices, indicating the potential in direct cascading of multiple devices for future nanoelectronic applications.

Electron transport in bilayer graphene placed under a perpendicular electric field is revealed experimentally. Steep increase of the resistance is observed under high electric field; however, the resistance does not diverge even at low temperatures. The observed temperature dependence of the conductance consists of two contributions: the thermally activated (TA) conduction and the variable range hopping (VRH) conduction. We find that for the measured electric field range (0−1.3 V/nm) the mobility gap extracted from the TA behavior agrees well with the theoretical prediction for the band gap opening in bilayer graphene, although the VRH conduction deteriorates the insulating state more seriously in bilayer graphene with smaller mobility. These results show that the improvement of the mobility is crucial for the successful operation of the bilayer graphene field effect transistor.

Self-assembly of interfaces is of great interest in physical and chemical domains. One of the most challenging targets is to obtain an optimal interface structure showing good electronic properties by solution-processing. Interfaces of semiconductor/semiconductor, semiconductor/insulator and insulator/insulator have been successfully manipulated to obtain high-performance devices. In this review we discuss a special class of interface, semiconductor/insulator interface, formed by vertical phase separation during spin-coating and focus on the versatile applications in organic field-effect transistors (OFETs). The formation of such an interface can be finished within tens of seconds and its mechanism is related to the materials, surfaces and dynamics. Fascinatingly, such self-assembly could be used to simplify the fabrication procedure, improve film spreading, change interfacial properties, modify semiconductor morphology, and encapsulate thin films. These merits lead to OFETs with high performance and good reliability. Also, the method is very suitable for combining with other solution-processed techniques such as patterning and post-annealing, which leads to facile paper electronics, in situ purification and single crystal formation. Research on this topic not only provides an in-depth understanding of self-assembly in solution processing, but also opens new paths towards flexible organic electronics.

Ferroelectric field-effect transistors (Fe-FETs) are of great interest for a variety of non-volatile memory device applications. High-performance top-gate Fe-FET memories using ferroelectric polymers of poly(vinylidene fluoride–trifluoroethylene) (P(VDF–TrFE)) and the inorganic oxide of InSiO were fabricated. The extracted electron mobility was as high as 84.1 cm2 V−1 s−1 in a low-frequency state. The interfacial charge transfer between the P(VDF–TrFE) and InSiO during annealing of the P(VDF–TrFE) layer benefits improvement in the device performance. The results show the potential of our Fe-FET memories for next-generation electronics.

We report single crystal formation of organic semiconducting small molecules via solvent vapor annealing (SVA) on a polymer base film (PBF). The soluble PBF strongly assists the self-assembly of small molecules to form single crystals; this sharply contrasts typical SVA where the inorganic base film such as SiO2 plays little or no role. We use a matrix of organic solvents and polymers to systematically investigate the re-crystallization of dioctylbenzothienobenzothiophene (C8-BTBT) by SVA on polymer surfaces. Crystallization by SVA clearly correlates with the miscibility of solvents and PBFs. The PBF dramatically increases the amount of condensed solvent on the surface. The additional solvent enhances the molecular mobility of small molecules to allow self-assembly in a distance over hundreds of microns, and stimulates crystal growth via Ostwald ripening. Based on this mechanism, the final crystal size of small molecules can be controlled to vary from tens of microns to millimetres simply by modifying the thickness of the base film. The approach was successfully applied to several semiconducting small molecules to form single crystals that exhibited field-effect response. Hence SVA on PBF is presented as a general and promising method for the direct fabrication of organic single crystals on polymer dielectrics.

A novel thienoacene compound, dihexyl-substituted dibenzo[d,d′]thieno[3,2-b;4,5-b′]dithiophene (C6-DBTDT), is developed as a p-type organic semiconductor for high-performance organic field-effect transistors. Insertion of an acceptor material at the contact interface enables substantial reduction in the threshold voltage and hysteresis behavior, and the field-effect mobilities of 2.5 and 3.1 cm2 V−1 s−1 are achieved for the C6-DBTDT film vacuum-deposited at room temperature and 80 °C, respectively.

One of the major factors driving the fast growth of the semiconductor manufacturing industry is a steady decrease in production costs. For traditional semiconductors, most of the cost originates from infrastructure, equipment, and processing. In contrast with low-cost strategies involving organic semiconductors, the materials can easily become one of the greatest costs. Here, we demonstrate a simple and efficient fabrication process, which involves in situ purification via spin-coating from organic semiconductor/polymer blends, to eliminate the influence of impurities on the electrical properties of the semiconductor. Thus, we achieve the same performance using low-purity, low-cost materials for transistor arrays with patterned organic semiconducting crystals as that obtained from high-purity materials. The exclusion of impurities is attributed to the vertical phase separation and crystallization that occur during spin-coating, which produces purified organic semiconducting crystals. With this reduction in cost, our results can redirect organic electronics to seek the lowest purity and lowest cost material that still provides adequate performance, rather than simply using the highest purity and costliest materials.